Instruction set Totally Explained

Everything about Instruction Set Architecture totally explained

An instruction set is [alist of] all the instructions, and all their variations, that a processor can execute.
Instructions include:

Arithmetic such as add and subtract
Logic instructions such as and, or, and not
Data instructions such as move, input, output, load, and store
Control flow instructions such as goto, if ... goto, call, and return.

An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O. An ISA includes a specification of the set of opcodes (machine language), the native commands implemented by a particular CPU design.
Instruction set architecture is distinguished from the microarchitecture, which is the set of processor design techniques used to implement the instruction set. Computers with different microarchitectures can share a common instruction set. For example, the Intel Pentium and the AMD Athlon implement nearly identical versions of the x86 instruction set, but have radically different internal designs.
This concept can be extended to unique ISAs like TIMI (Technology-Independent Machine Interface) present in the IBM System/38 and IBM AS/400. TIMI is an ISA that's implemented as low-level software and functionally resembles what is now referred to as a virtual machine. It was designed to increase the longevity of the platform and applications written for it, allowing the entire platform to be moved to very different hardware without having to modify any software except that which comprises TIMI itself. This allowed IBM to move the AS/400 platform from an older CISC architecture to the newer POWER architecture without having to recompile any parts of the OS or software associated with it. Nowadays there are several open source Operating Systems which could be easily ported on any existing general purpose CPU, because the compilation is the essential part of their design (for example new software installation).

Machine language

Machine language is built up from discrete statements or instructions. Depending on the processing architecture, a given instruction may specify:

Particular registers for arithmetic, addressing, or control functions

Particular memory locations or offsets

Particular addressing modes used to interpret the operands More complex operations are built up by combining these simple instructions, which (in a von Neumann machine) are executed sequentially, or as otherwise directed by control flow instructions.
Some operations available in most instruction sets include:

moving

set a register (a temporary "scratchpad" location in the CPU itself) to a fixed constant value
move data from a memory location to a register, or vice versa. This is done to obtain the data to perform a computation on it later, or to store the result of a computation.
read and write data from hardware devices

computing

add, subtract, multiply, or divide the values of two registers, placing the result in a register
perform bitwise operations, taking the conjunction/disjunction (and/or) of corresponding bits in a pair of registers, or the negation (not) of each bit in a register
compare two values in registers (for example, to see if one is less, or if they're equal)

affecting program flow

jump to another location in the program and execute instructions there
jump to another location if a certain condition holds
jump to another location, but save the location of the next instruction as a point to return to (a call)

Some computers include "complex" instructions in their instruction set. A single "complex" instruction does something that may take many instructions on other computers. Such instructions are typified by instructions that take multiple steps, control multiple functional units, or otherwise appear on a larger scale than the bulk of simple instructions implemented by the given processor. Some examples of "complex" instructions include:

saving many registers on the stack at once

moving large blocks of memory

complex and/or floating-point arithmetic (sine, cosine, square root, etc.)

performing an atomic test-and-set instruction

instructions that combine ALU with an operand from memory rather than a register A complex instruction type that has become particularly popular recently is the SIMD or Single-Instruction Stream Multiple-Data Stream operation or vector instruction, an operation that performs the same arithmetic operation on multiple pieces of data at the same time. SIMD have the ability of manipulating large vectors and matrices in minimal time. SIMD instructions allow easy parallelization of algorithms commonly involved in sound, image, and video processing. Various SIMD implementations have been brought to market under trade names such as MMX, 3DNow! and AltiVec.
The design of instruction sets is a complex issue. There were two stages in history for the microprocessor. One using CISC or complex instruction set computer where many instructions were implemented. In the 1970s places like IBM did research and found that many instructions were used that could be eliminated. The result was the RISC, reduced instruction set computer, architecture which uses a smaller set of instructions. The result was a simpler instruction set may offer the potential for higher speeds, reduced processor size, and reduced power consumption; a more complex one may optimize common operations, improve memory/cache efficiency, or simplify programming.

Instruction set design

When designing microarchitectures, engineers use blocks of "hard-wired" electronic circuitry (often designed separately) such as adders, multiplexers, counters, registers, ALUs etc. Some kind of register transfer language is then often used to describe the decoding and sequencing of each instruction of an ISA using this physical microarchitecture. There are two basic ways to implement this description (although many designs use middle ways or compromises):

Early computer designs and some of the simpler RISC computers "hard-wired" the complete instruction set decoding and sequencing (just like the rest of the microarchitecture).

Other designs employ microcode routines and/or tables to do this—typically as on chip ROMs and/or PLAs (although separate RAMs have been used historically). There are also some new CPU designs which compiles the instruction set to a writable RAM or FLASH inside the CPU (such as the Rekursiv processor and the Imsys Cjip)(External Link

), or an FPGA (reconfigurable computing). The Western Digital MCP-1600 is an older example, using a dedicated, separate ROM for microcode.
   An ISA can also be emulated in software by an interpreter. Naturally, due to the interpretation overhead, this is slower than directly running programs on the emulated hardware, unless the hardware running the emulator is an order of magnitude faster. Today, it's common practice for vendors of new ISAs or microarchitectures to make software emulators available to software developers before the hardware implementation is ready.
   Some instruction set designers reserve one or more opcodes for some kind of software interrupt. For example, MOS Technology 6502 uses 00_H, Zilog Z80 uses the eight codes C7,CF,D7,DF,E7,EF,F7,FF_H while Motorola 68000 use codes in the range A000..AFFF_H.
   Fast virtual machines are much easier to implement if an instruction set meets the Popek and Goldberg virtualization requirements.
   On systems with multiple processors, non-blocking synchronization algorithms are much easier to implement if the instruction set includes support for something like "fetch-and-increment" or "load linked/store conditional (LL/SC)" or "atomic compare and swap".

Code density

In early computers, program memory was expensive, so minimizing the size of a program to make sure it would fit in the limited memory was often central. Thus the combined size of all the instructions needed to perform a particular task, the code density, was an important characteristic of any instruction set. Computers with high code density also often had (and has) complex instructions for procedure entry, parameterized returns, loops etc (therefore retroactively named Complex Instruction Set Computers, CISC). However, more typical, or frequent, "CISC" instructions merely combine a basic ALU operation, such as "add", with the access of one or more operands in memory (using addressing modes such as direct, indirect, indexed etc). Certain architectures may allow two or three operands (including the result) directly in memory or may be able to perform functions such as automatic pointer increment etc. Software-implemented instruction sets may have even more complex and powerful instructions. Reduced instruction-set computers, RISC, were first widely implemented during a period of rapidly-growing memory subsystems and sacrifice code density in order to simplify implementation circuitry and thereby try to increase performance via higher clock frequencies and more registers. RISC instructions typically perform only a single operation, such as an "add" of registers or a "load" from a memory location into a register; they also normally use a fixed instruction width, whereas a typical CISC instruction set has many instructions shorter than this fixed length. Fixed-width instructions are less complicated to handle than variable-width instructions for several reasons (not having to check whether an instruction straddles a cache line or virtual memory page boundary. In a typical three-operand RISC machines, all three operands must be registers, so explicit load/store instructions are needed. An instruction set with 32 registers requires 15 bits to encode three register operands, so this scheme is typically limited to instructions sets with 32-bit instructions or longer. Example: load a, reg1; load b, reg2; add reg1+reg2->reg3; store reg3,c;

more operands -- some CISC machines permit a variety of addressing modes that allow more than 3 operands (registers or memory accesses), such as the VAX "POLY" polynomial evaluation instruction.

List of ISAs

This list is far from comprehensive as old architectures are abandoned and new ones invented on a continual basis. There are many commercially available microprocessors and microcontrollers implementing ISAs. Customised ISAs are also quite common in some applications, for example ARC International, application-specific integrated circuit, FPGA, and reconfigurable computing. Also see history of computing hardware.

ISAs implemented in hardware

Alpha

ARM

Burroughs B5000/B6000/B7000 series

IA-64 (Itanium)

MIPS

PA-RISC

SuperH

Tricore

Transputer

UNIVAC 1100/2200 series

x86

IA-32 (i386, Pentium, Athlon)
x86-64 (64-bit superset of IA-32)

EISC (AE32K)

ISAs commonly implemented in software with hardware incarnations

p-Code (UCSD p-System Version III on Western Digital Pascal MicroEngine)

Java virtual machine (ARM Jazelle, PicoJava, JOP)

FORTH

ISAs never implemented in hardware

ALGOL object code

SECD machine, a virtual machine used for some functional programming languages.

MMIX, a teaching machine used in Donald Knuth's The Art of Computer Programming

Z-machine, a virtual machine used for Infocom's text adventure gamesFurther Information

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